The present invention relates to wafer testing, and more specifically to optical testing of wafers in which optical alignment to input-output optical couplers is relaxed to increase wafer throughput.
Fabricating integrated electronic circuits on wafers includes a number of manufacturing stages. At any given stage, the wafer may be tested in order to identify defective components and/or chips. These wafers with defective components and/or chips may then be removed from the fabrication line to improve yield and reduce costs. One method of wafer testing includes optical testing. In an exemplary optical test, a waveguide is disposed in a silicon layer of the wafer. Light is input at an input end of the waveguide and exits at an output end of the waveguide. Changes in properties of the light during its travel through the waveguide provide a measurement of a parameter of the wafer or component that may be used to determine the quality of the wafer. Obtained optical measurements generally include on-chip optical loss (i.e., loss along the waveguide) and optical loss that occurs at both the input and output ends of the waveguide due to alignment issues between the waveguide and various input and/or output devices. Device parameters other than loss can also be measured, such as wavelength shift or phase shift. These parameters can be converted into a measured optical loss by a physical design of the test site on the wafer. While it is desirable to measure on-chip optical loss, it is difficult to determine how much of the measured loss is on-chip optical loss and how much is due to alignment issues with respect to input/output (IO) device coupling. Additionally, optical loss due to IO device coupling alignment often is greater than the measured on-chip optical component loss and so presents a significant measurement error, preventing repeatable measurements between test sites and over time.